MB510 datasheet

http://www.datasheet-photos.com/images/1pcsB.jpgIf you want to buy this product please visit:http://www.datasheet-photos.com/Product/MB510.htmlPopular search:MB510 datasheetMB510 equivalentMB510 pinoutMB510 icSept. 1995Edition 3.0b DATA SHEET 2.7GHz TWO MODULUS PRESCALER2.7GHz TWO MODULUS PRESCALERThe Fujitsu MB510 is an ultra high speed, two modulus prescaler that forms a Phase Locked Loop (PLL) when combined with a frequency synthesizer such as the Fujitsu MB87001A. It divides the input frequency by the modulus of 128/144 or 256/272, and operates at a low power supply current of 10mA at 5.0V.Through the use of Fujitsu’s Advanced Process Technology, the MB510 achieves extremely small stray capacitance from its internal elements.FEATURES High Frequency Operation: 2.7GHz max. Power Dissipation: 50mW typ. Pulse Swallow Function: 128/144, 256/272 Wide Operation Temperature: -40C to +85C Stable Output Amplitude: VOUT = 1.6Vp–p typ. Built–in Termination Resistor Complete PLL synthesizer circuit with the Fujitsu MB87001A PLLsynthesizer IC PackageStandard 8-pin Flat Package (Suffix: –PF)PLASTIC PACKAGE FPT-08P-M01PIN ASSIGNMENTABSOLUTE MAXIMUM RATINGS (See Note)Rating Symbol Value Unit Supply Voltage VCC �.5 to +7.0 V Input Voltage VIN �.5 to VCC VOutput Current IO 10 mA Storage Temperature TSTG �5 to +125 CIN VCC SW1 8 IN2 7 NC TOP VIEW4 5 GNDNote: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.Copyright © 1995 by FUJITSU LIMITED and FUJITSU MICROELECTRONICS, INC.D Q D Q D QC C QINPUT BUFFERIN D QIN C QD Q D Q D Q C Q C Q C QD Q D QOUTPUT BUFFERC Q SWQSW MC Divide RatioH H 1/128H L 1/144L H 1/256L L 1/272Note: SW: H = VCC, L = openMC: H = 2.0V to VCC, L = GND to 0.8VFigure 1. MB510 Block DiagramPIN DESCRIPTIONPin Number Symbol Function1 IN Input2 VCC DC Supply Voltage3 SW Divide Ratio Control Input (See Divide Ratio Table)4 OUT Output5 GND Ground6 MC Modulus Control Input (See Divide Ratio Table)7 NC Non Connection8 IN Complementary InputRECOMMENDED OPERATING CONDITIONSParameter SymbolMin. Typ. Max.Supply Voltage VCC 4.5 5.0 5.5 V Output Current IO 1.2 mA Ambient Temperature TA �0 +85 CLoad Capacitance CL 8 pFELECTRICAL CHARACTERISTICS(Recommended Operating Conditions unless otherwise noted)Parameter Symbol ConditionMin. Typ. Max.Supply Curent ICC 10.0 15.0 mA Built-in a terminationOutput Amplitude VOresistor.Load capacitance = 8pF1.0 1.6 Vp–pWith input couplingcapacitor 1000pF 10 2700 MHzfIN = 10 to 2200MHz �0 10Input Signal Amplitude PINHigh Level Input Voltage for MCfIN = 2200 to 2700MHz � 10Input VIHM 2.0 VLow Level Input Voltage for MCInput VILM 0.8 VHigh Level Input Voltage for SWInput VIHS* VCC �.1 VCC VCC +0.1 VLow Level Input Voltage for SWInput VILS Open VHigh Level Input Current for MCInput IIHM VIH = 2.0V 0.4 mALow Level Input Current for MCInput IILM VIL = 0.8V �.2 mAModulus Set-up Time MC to OUT tSET 16 26 nsNote: *Design GuaranteeSampling scope input point for input waveformVCC SWVCC = +5.0V + 10% C3Sampling scope prober point for output waveform50 IN C2MC GNDMC InputC1 : 1000pF C2 : 1000pF C3 : 0.1 FCL : 8pF (including scope and jig capacitance)Figure 2. Test CircuitVCC = 5.0V TA = 25C10 20 50 100 200 500 1000 2000INPUT FREQUENCY (MHz)Figure 3. Input Signal Amplitude vs. Input FrequencyTIMING CHART (2 MODULUS)Example: Divide ratio = 128/144128 14464 64 64 8064 64 64 64 64 64 80 64 80 64 80Note: When divide of 144 is selected, positive pulse is applied by 16 to 80.tSET tSETThe typical set up time is 16 ns from the MC signal input to the timing of change of prescaler divide ratio.C2 X1VCC VCCVSX (Max. 8V)Clock Data LE0.047 F16 15 14 13 12 11 10 9MB 87001A1 2 3 4 5 6 7 88 7 6 51 2 3 4X1 : 12.8MHz X’talVCC : 5V + 10% VSX : 8V max.C1, C2 : depends on crystal oscillatorFigure 4. Typical Application ExamplePACKAGE DIMENSIONS(Suffix: –PF)8-LEAD PLASTIC FLAT PACKAGE (CASE No: FPT-08P-M01)(6.35 + 0.25.089(2.25) MAX (SEATED HEIGHT).002(0.05) MIN(STAND OFF).307+.016 (7.80+0.40).209+.012 (5.30+0.30).268 �.008 (6.80 �0.20 ).050(1.27).018+.004�.005(0.13) M.020+.008 (0.50+0.20).006 + .002.150(3.81) REF(0.45+0.10)�.001 (0.15 �0.02 )Details of “A�part.008(0.20) .004(0.10).020(0.50).007(0.18).027(0.68)�1988 FUJITSU LIMITED F08002S-3CDImensions in inches (millimeters)All Rights Reserved.Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Complete information sufficient for construction purposes is not necessarily given.The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu assumes no responsibility for inaccuracies.The information contained in this document does not convey any license under the copy- rights, patent rights or trademarks claimed and owned by Fujitsu.Fujitsu reserves the right to change products or specifications without notice.No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu.